[Neuromancer]

WITH ANOTHER LAUNCH of the Nvidia GT300 Fermi GF100 GTX480 upon us, it is time for an update on the status of that wayward part. Production parts have been coming back from TSMC for several weeks now, and the outlook for them is grim.

We first got word that production A3 GF100s were back in Santa Clara near the end of January. When enough of them rolled off the line to characterize the silicon, we hear there were no parties in Santa Clara. For those not interested in the 'why' side of things, the short answer is that the top bin as it stands now is about 600MHz for the half hot clock, and 1200MHz for the hot clock, and the initial top part will have 448 shaders. On top of that, the fab wafer yields are still in single digit percentages.

That said, the situation is far more nuanced than those three numbers suggest, and the atrocious yields are even after the chip has been downclocked and defective units fused off. To make matters even worse, the problems that caused these low yields are likely unfixable without a complete re-layout. Lets look at these problems one at a time.

Number one on Nvidia's hit list is yields. If you recall, we said that the yield on the first hot lot of Fermis that came back from TSMC was 7 good chips out of a total of 416 candidates, or a yield of less than 2 percent.

The problem that Nvidia faces can be traced to what it is doing to fix the issues they face. The three steppings of GF100 are all what are known as metal layer spins, something that is cheaper and faster than a full base layer respin, taking about two months to see results. A full base layer respin takes well over a quarter, likely more than six months to accomplish, and costs more than $1 million just for the masks. Metal layer spins are denoted by upping the number, A1 to A2 for example, while base layer respins up the letter, A3 to B1. Nvidia counts first silicon from A1, so the current A3 is the third metal spin.

Metal layer spins tend to solve logic problem like 1 + 1 = 3, not power or yield issues. Most yield problems are related to the process that the chips are made on, and modified by factors like how fast you try to run the transistors, how much you bend the design rules, and other related issues. While this is a very simplified version, metal layer spins don't tend to do much for power consumption or yield problems.

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Source: Semiaccurate